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LCTRTS
2007
Springer
15 years 3 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
CC
2006
Springer
124views System Software» more  CC 2006»
15 years 1 months ago
Polyhedral Code Generation in the Real World
The polyhedral model is known to be a powerful framework to reason about high level loop transformations. Recent developments in optimizing compilers broke some generally accepted ...
Nicolas Vasilache, Cédric Bastoul, Albert C...
CORR
2007
Springer
170views Education» more  CORR 2007»
14 years 9 months ago
Animation of virtual mannequins, robot-like simulation or motion captures
— In order to optimize the costs and time of design of the new products while improving their quality, concurrent engineering is based on the digital model of these products, the...
Damien Chablat
IWOMP
2007
Springer
15 years 3 months ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
91
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DEXA
2000
Springer
132views Database» more  DEXA 2000»
15 years 1 months ago
Improving the Performance of High-Energy Physics Analysis through Bitmap Indices
Abstract. Bitmap indices are popular multi-dimensional data structures for accessing read-mostly data such as data warehouse (DW) applications, decision support systems (DSS) and o...
Kurt Stockinger, Dirk Düllmann, Wolfgang Hosc...