109 search results - page 11 / 22 » Data cache locking for higher program predictability |
ISCA
1997
IEEE
15 years 1 months ago
1997
IEEE
As processor architectures have increased their reliance on speculative execution to improve performance, the importance of accurate prediction of what to execute speculatively ha...
CASES
2003
ACM
15 years 2 months ago
2003
ACM
This paper presents a highly predictable, low overhead and yet dynamic, memory allocation strategy for embedded systems with scratch-pad memory. A scratch-pad is a fast compiler-m...
ASPLOS
1996
ACM
15 years 1 months ago
1996
ACM
: One of the fundamental limits to high-performance, high-reliability file systems is memory's vulnerability to system crashes. Because memory is viewed as unsafe, systems per...
CC
2010
Springer
15 years 4 months ago
2010
Springer
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
JSA
2000
14 years 9 months ago
2000
In this article, the problem of finding a tight estimate on the worst-case execution time (WCET) of a real-time program is addressed. The analysis is focused on straight-line code...