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» Data cache locking for higher program predictability
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IEEEPACT
2002
IEEE
15 years 2 months ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...
IISWC
2006
IEEE
15 years 3 months ago
Load Instruction Characterization and Acceleration of the BioPerf Programs
The load instructions of some of the bioinformatics applications in the BioPerf suite possess interesting characteristics: only a few static loads cover almost the entire dynamic ...
Paruj Ratanaworabhan, Martin Burtscher
92
Voted
SIGARCH
2008
73views more  SIGARCH 2008»
14 years 9 months ago
Servo: a programming model for many-core computing
Conventional programming models were designed to be used by expert programmers for programming for largescale multiprocessors, distributed computational clusters, or specialized p...
Nicolas Zea, John Sartori, Rakesh Kumar
ISPASS
2010
IEEE
14 years 11 months ago
Understanding transactional memory performance
Abstract—Transactional memory promises to generalize transactional programming to mainstream languages and data structures. The purported benefit of transactions is that they ar...
Donald E. Porter, Emmett Witchel
ECOOP
2008
Springer
14 years 11 months ago
Online Phase-Adaptive Data Layout Selection
Good data layouts improve cache and TLB performance of object-oriented software, but unfortunately, selecting an optimal data layout a priori is NP-hard. This paper introduces layo...
Chengliang Zhang, Martin Hirzel