Sciweavers

491 search results - page 13 / 99
» Data communication estimation and reduction for reconfigurab...
Sort
View
FPL
2010
Springer
131views Hardware» more  FPL 2010»
14 years 7 months ago
Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique
The paper describes application of the clock-gating techniques, often used in ASIC designs, to the field of FPGAbased systems. The clock-gating techniques are used to reduce the to...
Antonin Hermanek, Michal Kunes, Milan Tichý
FPL
2008
Springer
175views Hardware» more  FPL 2008»
14 years 11 months ago
File system access from reconfigurable FPGA hardware processes in BORPH
This paper presents the design and implementation of BORPH's kernel file system layer that provides FPGA processes direct access to the general file system. Using a semantics...
Hayden Kwok-Hay So, Robert W. Brodersen
CORR
2010
Springer
117views Education» more  CORR 2010»
14 years 9 months ago
Relay Assisted Cooperative OSTBC Communication with SNR Imbalance and Channel Estimation Errors
In this paper, a two-hop relay assisted cooperative Orthogonal Space-Time Block Codes (OSTBC) transmission scheme is considered for the downlink communication of a cellular system,...
Bo Niu, Mihaela C. Beluri, Zinan Lin, Prabhakar Ch...
ICASSP
2008
IEEE
15 years 3 months ago
OFDM for underwater acoustic communications: Adaptive synchronization and sparse channel estimation
A phase synchronizationmethod, which provides non-uniform frequency offset compensation needed for wideband OFDM [1], is coupled with low-complexity channel estimation in the time...
Milica Stojanovic
ICC
2009
IEEE
151views Communications» more  ICC 2009»
15 years 4 months ago
Improved Vector Perturbation with Modulo Loss Reduction for Multiuser Downlink Systems
— In this paper, we present an improved precoding technique which reduces a modulo loss in vector perturbation (VP) with low complexity for the downlink of a multiuser multiple-i...
Hyeon-Seung Han, Seokhwan Park, Inkyu Lee