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» Data partitioning on chip multiprocessors
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CASES
2006
ACM
15 years 3 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
RTSS
2006
IEEE
15 years 3 months ago
LITMUS^RT : A Testbed for Empirically Comparing Real-Time Multiprocessor Schedulers
We present a real-time, Linux-based testbed called LITMUSRT , which we have developed for empirically evaluating multiprocessor real-time scheduling algorithms. We also present th...
John M. Calandrino, Hennadiy Leontyev, Aaron Block...
PLDI
2010
ACM
15 years 2 months ago
Software data spreading: leveraging distributed caches to improve single thread performance
Single thread performance remains an important consideration even for multicore, multiprocessor systems. As a result, techniques for improving single thread performance using mult...
Md Kamruzzaman, Steven Swanson, Dean M. Tullsen
DATE
2004
IEEE
173views Hardware» more  DATE 2004»
15 years 1 months ago
Supporting Cache Coherence in Heterogeneous Multiprocessor Systems
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors in a single chip is increasing. An important issue in integrating heterogeneous ...
Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee
TC
2008
14 years 9 months ago
Secure Memory Accesses on Networks-on-Chip
Security is gaining relevance in the development of embedded devices. Toward a secure system at each level of design, this paper addresses security aspects related to Network-on-Ch...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...