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» Data partitioning on chip multiprocessors
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IEEEPACT
2008
IEEE
15 years 4 months ago
The PARSEC benchmark suite: characterization and architectural implications
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
Christian Bienia, Sanjeev Kumar, Jaswinder Pal Sin...
80
Voted
ISCA
2003
IEEE
183views Hardware» more  ISCA 2003»
15 years 2 months ago
The Jrpm System for Dynamically Parallelizing Java Programs
We describe the Java runtime parallelizing machine (Jrpm), a complete system for parallelizing sequential programs automatically. Jrpm is based on a chip multiprocessor (CMP) with...
Michael K. Chen, Kunle Olukotun
MICRO
2000
IEEE
118views Hardware» more  MICRO 2000»
15 years 2 months ago
A study of slipstream processors
A slipstream processor reduces the length of a running program by dynamically skipping computation non-essential for correct forward progress. The shortened program runs faster as...
Zachary Purser, Karthik Sundaramoorthy, Eric Roten...
84
Voted
DAC
2007
ACM
15 years 10 months ago
Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification
Programming multi-processor systems-on-chip (MPSoC) involves partitioning and mapping of sequential reference code onto multiple parallel processing elements. The immense potentia...
Pramod Chandraiah, Rainer Dömer
EUROPAR
2004
Springer
15 years 1 months ago
Efficient Parallel Hierarchical Clustering
Hierarchical agglomerative clustering (HAC) is a common clustering method that outputs a dendrogram showing all N levels of agglomerations where N is the number of objects in the d...
Manoranjan Dash, Simona Petrutiu, Peter Scheuerman...