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» Data partitioning on chip multiprocessors
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CASES
2006
ACM
14 years 6 days ago
High-level power analysis for multi-core chips
Technology trends have led to the advent of multi-core chips in the form of both general-purpose chip multiprocessors (CMPs) and embedded multi-processor systems-on-a-chip (MPSoCs...
Noel Eisley, Vassos Soteriou, Li-Shiuan Peh
PPL
2008
144views more  PPL 2008»
13 years 6 months ago
Rapid Prototyping of the Data-Driven Chip-Multiprocessor (d2-CMP) Using FPGAs
This paper presents the FPGA implementation of the prototype for the Data-Driven Chip-Multiprocessor (D2-CMP). In particular, we study the implementation of a Thread Synchronizati...
Konstantinos Tatas, Costas Kyriacou, Paraskevas Ev...
IEEEPACT
2009
IEEE
14 years 27 days ago
Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessors
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
Qingda Lu, Christophe Alias, Uday Bondhugula, Thom...
DATE
2005
IEEE
111views Hardware» more  DATE 2005»
13 years 8 months ago
Simultaneous Partitioning and Frequency Assignment for On-Chip Bus Architectures
In this paper, we provide a methodology to perform both bus partitioning and bus frequency assignment to each of the bus segment simultaneously while optimizing both power consump...
Suresh Srinivasan, Lin Li, Narayanan Vijaykrishnan
SIGARCH
2008
144views more  SIGARCH 2008»
13 years 6 months ago
A stream chip-multiprocessor for bioinformatics
- Bioinformatics applications such as gene and protein sequence matching algorithms are characterized by the need to process large amounts of data. While uni-processor performance ...
Ravi Kiran Karanam, Arun Ravindran, Arindam Mukher...