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HPCA
1999
IEEE
15 years 9 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...
MICRO
1997
IEEE
128views Hardware» more  MICRO 1997»
15 years 9 months ago
Run-Time Spatial Locality Detection and Optimization
As the disparity between processor and main memory performance grows, the number of execution cycles spent waiting for memory accesses to complete also increases. As a result, lat...
Teresa L. Johnson, Matthew C. Merten, Wen-mei W. H...
CLUSTER
2004
IEEE
15 years 9 months ago
JuxtaView - a tool for interactive visualization of large imagery on scalable tiled displays
JuxtaView is a cluster-based application for viewing ultra-high-resolution images on scalable tiled displays. We present in JuxtaView, a new parallel computing and distributed mem...
Naveen K. Krishnaprasad, Venkatram Vishwanath, Sha...
USENIX
2008
15 years 7 months ago
Optimizing TCP Receive Performance
The performance of receive side TCP processing has traditionally been dominated by the cost of the `per-byte' operations, such as data copying and checksumming. We show that ...
Aravind Menon, Willy Zwaenepoel
143
Voted
JILP
2000
109views more  JILP 2000»
15 years 5 months ago
Dynamic Register Renaming Through Virtual-Physical Registers
Register file access time represents one of the critical delays of current microprocessors, and it is expected to become more critical as future processors increase the instructio...
Teresa Monreal, Antonio González, Mateo Val...