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162
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ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
16 years 2 months ago
A Minimal Dual-Core Speculative Multi-Threading Architecture
Speculative Multi-Threading (SpMT) can improve single-threaded application performance using the multiple thread contexts available in current processors. We propose a minimal SpM...
Srikanth T. Srinivasan, Haitham Akkary, Tom Holman...
ISCA
2009
IEEE
143views Hardware» more  ISCA 2009»
16 years 7 days ago
Spatio-temporal memory streaming
Recent research advocates memory streaming techniques to alleviate the performance bottleneck caused by the high latencies of off-chip memory accesses. Temporal memory streaming r...
Stephen Somogyi, Thomas F. Wenisch, Anastasia Aila...
MICRO
2007
IEEE
129views Hardware» more  MICRO 2007»
15 years 12 months ago
A Framework for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed techniques for coherence traffic reduct...
Jason Zebchuk, Elham Safi, Andreas Moshovos
ICS
2007
Tsinghua U.
15 years 11 months ago
Representation-transparent matrix algorithms with scalable performance
Positive results from new object-oriented tools for scientific programming are reported. Using template classes, abstractions of matrix representations are available that subsume...
Peter Gottschling, David S. Wise, Michael D. Adams
128
Voted
LAWEB
2006
IEEE
15 years 11 months ago
OWeB: A Framework for Offline Web Browsing
Internet browsing is highly dependent on the real-time network availability and speed. This becomes a significant constraint when browsing over slow and intermittent networks. In ...
Ganesh Ananthanarayanan, Sean Olin Blagsvedt, Kent...