4278 search results - page 15 / 856 » Data prefetch mechanisms |
112
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IEEEPACT
2002
IEEE
15 years 4 months ago
2002
IEEE
Simultaneous Multithreading (SMT) processors achieve high processor throughput at the expense of single-thread performance. This paper investigates resource allocation policies fo...
114
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ASPLOS
1992
ACM
15 years 3 months ago
1992
ACM
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
143
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MICRO
1991
IEEE
15 years 3 months ago
1991
IEEE
The performance of superscalar processors is more sensitive to the memory system delay than their single-issue predecessors. This paper examines alternative data access microarchi...
110
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ISPDC
2010
IEEE
14 years 10 months ago
2010
IEEE
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
104
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ICDCS
2008
IEEE
15 years 6 months ago
2008
IEEE
The multi-level storage architecture has been widely adopted in servers and data centers. However, while prefetching has been shown as a crucial technique to exploit the sequentia...