4278 search results - page 37 / 856 » Data prefetch mechanisms |
101
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IEEEPACT
2005
IEEE
15 years 5 months ago
2005
IEEE
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
117
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PARCO
2003
15 years 1 months ago
2003
Three different partial differential equation (PDE) solver kernels are analyzed in respect to cache memory performance on a simulated shared memory computer. The kernels implement...
ISSS
1999
IEEE
15 years 4 months ago
1999
IEEE
Partition Scheduling with Prefetching (PSP) is a memory latency hiding technique which combines the loop pipelining technique with data prefetching. In PSP, the iteration space is...
SC
1995
ACM
15 years 3 months ago
1995
ACM
This paper presents techniques for compiling loops with complex, indirect array accesses into loops whose array references have at most one level of indirection. The transformatio...
HIPEAC
2009
Springer
15 years 4 months ago
2009
Springer
Abstract. Technological advances and increasingly complex and dynamic application behavior argue for revisiting mechanisms that adapt logical cache block size to application charac...