This paper presents a task-centric memory model for 1000-core compute accelerators. Visual computing applications are emerging as an important class of workloads that can exploit ...
John H. Kelm, Daniel R. Johnson, Steven S. Lumetta...
—Instruction fetching is critical to the performance of a superscalar microprocessor. We develop a mathematical model for three different cache techniques and evaluate its perfor...
In this paper, we introduce a new fine-grain distributed information protection mechanism which can self-protect, self-discover, self-organize, and selfmanage. In our approach, we...
We describe an efficient framework for Web personalization based on sequential and non-sequential pattern discovery from usage data. Our experimental results performed on real us...
Bamshad Mobasher, Honghua Dai, Tao Luo, Miki Nakag...
Recent research advocates address-correlating predictors to identify cache block addresses for prefetch. Unfortunately, address-correlating predictors require correlation data sto...