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ICS
2000
Tsinghua U.
15 years 1 months ago
Push vs. pull: data movement for linked data structures
As the performance gap between the CPU and main memory continues to grow, techniques to hide memory latency are essential to deliver a high performance computer system. Prefetchin...
Chia-Lin Yang, Alvin R. Lebeck
83
Voted
MICRO
2010
IEEE
270views Hardware» more  MICRO 2010»
14 years 7 months ago
Many-Thread Aware Prefetching Mechanisms for GPGPU Applications
Abstract-- We consider the problem of how to improve memory latency tolerance in massively multithreaded GPGPUs when the thread-level parallelism of an application is not sufficien...
Jaekyu Lee, Nagesh B. Lakshminarayana, Hyesoon Kim...
KDD
2001
ACM
237views Data Mining» more  KDD 2001»
15 years 10 months ago
Exploiting Web Log Mining for Web Cache Enhancement
Abstract. Improving the performance of the Web is a crucial requirement, since its popularity resulted in a large increase in the user perceived latency. In this paper, we describe...
Alexandros Nanopoulos, Dimitrios Katsaros, Yannis ...
IEEEPACT
2003
IEEE
15 years 2 months ago
Compiler-Directed Content-Aware Prefetching for Dynamic Data Structures
This paper describes Compiler-Directed Content-Aware Prefetching (CDCAP), an integrated compiler and hardware approach for prefetching dynamic data structures. The approach utiliz...
Hassan Al-Sukhni, Ian Bratt, Daniel A. Connors
ICPP
2003
IEEE
15 years 2 months ago
Enabling Partial Cache Line Prefetching Through Data Compression
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
Youtao Zhang, Rajiv Gupta