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LCN
2005
IEEE
15 years 5 months ago
Implementation and Performance Analysis of a Packet Scheduler on a Programmable Network Processor
— The problem of achieving fairness in the allocation of the bandwidth resource on a link shared by multiple flows of traffic has been extensively researched over the last deca...
Fariza Sabrina, Salil S. Kanhere, Sanjay Jha
SBACPAD
2005
IEEE
176views Hardware» more  SBACPAD 2005»
15 years 5 months ago
Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation
The time required to simulate a complete benchmark program using the cycle-accurate model of a microprocessor can be prohibitively high. One of the proposed methodologies, represe...
Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy Kuri...
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 5 months ago
A technique for low energy mapping and routing in network-on-chip architectures
Network-on-chip (NoC) has been proposed as a solution for the global communication challenges of System-on-chip (SoC) design in the nanoscale technologies. NoC design with mesh ba...
Krishnan Srinivasan, Karam S. Chatha
SBCCI
2005
ACM
276views VLSI» more  SBCCI 2005»
15 years 5 months ago
Virtual channels in networks on chip: implementation and evaluation on hermes NoC
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...
Aline Mello, Leonel Tedesco, Ney Calazans, Fernand...
ATAL
2005
Springer
15 years 5 months ago
Rapid on-line temporal sequence prediction by an adaptive agent
Robust sequence prediction is an essential component of an intelligent agent acting in a dynamic world. We consider the case of near-future event prediction by an online learning ...
Steven Jensen, Daniel Boley, Maria L. Gini, Paul R...
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