5414 search results - page 88 / 1083 » Data representation synthesis |
141
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TOG
2012
13 years 2 months ago
2012
Current methods for combining two different images produce visible artifacts when the sources have very different textures and structures. We present a new method for synthesizing...
97
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ICCAD
2006
IEEE
15 years 8 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
112
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AHS
2007
IEEE
15 years 3 months ago
2007
IEEE
In this paper, we propose a design methodology for implementing a multimode (or multi-configuration) and multi-throughput system into a single hardware architecture. The inputs of...
CODES
2004
IEEE
15 years 3 months ago
2004
IEEE
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
DAC
1998
ACM
16 years 25 days ago
1998
ACM
Commercial tools for standard-cell based datapath design are here classed according to design flows, and the advantages of each class are discussed with the results of two test ci...