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ISCAS
2008
IEEE
203views Hardware» more  ISCAS 2008»
15 years 11 months ago
Enhanced multi-bit delta-sigma modulator with two-step pipeline quantizer
—A new delta-sigma Analog-to-Digital Converter (ADC) is presented in this paper. A two-step pipeline ADC is used as the quantizer of this delta-sigma modulator to reduce the quan...
Omid Rajaee, Un-Ku Moon
130
Voted
ASYNC
2004
IEEE
121views Hardware» more  ASYNC 2004»
15 years 8 months ago
Static Tokens: Using Dataflow to Automate Concurrent Pipeline Synthesis
We describe a new intermediate compiler representation, static token form, that is suitable for dataflow-style synthesis of high-level asynchronous specifications. Static token fo...
John Teifel, Rajit Manohar
ATVA
2011
Springer
295views Hardware» more  ATVA 2011»
14 years 4 months ago
Parallel Nested Depth-First Searches for LTL Model Checking
Even though the well-known nested-depth first search algorithm for LTL model checking provides good performance, it cannot benefit from the recent advent of multi-core computers....
Sami Evangelista, Laure Petrucci, Samir Youcef
134
Voted
EVOW
2008
Springer
15 years 6 months ago
Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures
Abstract. In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although ...
Lukás Sekanina, Petr Mikusek
128
Voted
ISCAS
2005
IEEE
140views Hardware» more  ISCAS 2005»
15 years 10 months ago
Low energy asynchronous architectures
: Asynchronous circuits are often presented as a means of achieving low power operation. We investigate their suitability for low-energy applications, where long battery life and d...
Ilya Obridko, Ran Ginosar