1602 search results - page 107 / 321 » Database Architectures for New Hardware |
119
click to vote
ISCAS
2008
IEEE
15 years 11 months ago
2008
IEEE
—Software-based self-test (SBST) is a promising new technology for at-speed testing of embedded processors in SoC systems. This paper introduces an effective and efficient new ho...
137
click to vote
ICCD
1999
IEEE
15 years 9 months ago
1999
IEEE
The architecture of the TriMedia CPU64 is based on the TM1000 DSPCPU. The original VLIW architecture has been extended with the concepts of vector processing and superoperations. ...
191
click to vote
ISCA
2011
IEEE
14 years 8 months ago
2011
IEEE
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
152
click to vote
PDPTA
2000
15 years 6 months ago
2000
The paper focuses on coarse-grained dynamically reconfigurable array architectures promising performance and flexibility for different challenging application areas, e. g. future ...
125
click to vote
CORR
2006
Springer
15 years 5 months ago
2006
Springer
Data compression algorithms change frequently, and obsolete decoders do not always run on new hardware and operating systems, threatening the long-term usability of content archiv...