Sciweavers

47 search results - page 9 / 10
» Datapath Design for a VLIW Video Signal Processor
Sort
View
HOTI
2008
IEEE
15 years 4 months ago
NoC with Near-Ideal Express Virtual Channels Using Global-Line Communication
As processor core counts increase, networks-on-chip (NoCs) are becoming an increasingly popular interconnection fabric due to their ability to supply high bandwidth. However, NoCs...
Tushar Krishna, Amit Kumar 0002, Patrick Chiang, M...
SAMOS
2004
Springer
15 years 2 months ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
ICIP
2007
IEEE
15 years 3 months ago
Software Pipelines Design for Variable Block-Size Motion Estimation with Large Search Range
This paper presents some techniques for efficient motion estimation (ME) implementation on fixed-point digital signal processor (DSP) for high resolution video coding. First, chal...
Zhigang Yang, Wen Gao, Yan Liu, Debin Zhao
68
Voted
ASAP
2002
IEEE
103views Hardware» more  ASAP 2002»
15 years 2 months ago
PAPA - Packed Arithmetic on a Prefix Adder for Multimedia Applications
This paper introduces PAPA: Packed Arithmetic on a Prefix Adder, a new approach to parallel prefix adder design that supports a wide variety of packed arithmetic computations, inc...
Neil Burgess
DAC
2002
ACM
15 years 10 months ago
Compiler-directed scratch pad memory hierarchy design and management
One of the primary challenges in embedded system design is designing the memory hierarchy and restructuring the application to take advantage of it. This task is particularly impo...
Mahmut T. Kandemir, Alok N. Choudhary