145 search results - page 9 / 29 » Datapath Scheduling using Dynamic Frequency Clocking |
ISLPED
2003
ACM
15 years 2 months ago
2003
ACM
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...
ISCA
2011
IEEE
14 years 1 months ago
2011
IEEE
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...
RTAS
1999
IEEE
15 years 1 months ago
1999
IEEE
In this paper we propose a dynamic constraint transformation technique for ensuring timing requirements in a distributed real-time system possessing periodically synchronized dist...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper presents a wrapper and test access mechanism design for multi-clock domain SoCs that consists of cores with different clock frequencies during test. We also propose a t...
JEC
2006
14 years 9 months ago
2006
Chip multi-processors (CMP) are rapidly emerging as an important design paradigm for both high performance and embedded processors. These machines provide an important performance...