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DATE
2010
IEEE
113views Hardware» more  DATE 2010»
15 years 2 months ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
DATE
1998
IEEE
153views Hardware» more  DATE 1998»
15 years 2 months ago
An Energy-Conscious Exploration Methodology for Reconfigurable DSPs
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
Jan M. Rabaey, Marlene Wan
DAC
2002
ACM
15 years 10 months ago
Guaranteed passive balancing transformations for model order reduction
The major concerns in state-of-the-art model reduction algorithms are: achieving accurate models of sufficiently small size, numerically stable and efficient generation of the mod...
Joel R. Phillips, Luca Daniel, Luis Miguel Silveir...
CHI
2008
ACM
15 years 10 months ago
Technology in mental health
Mental illness has been identified as one of the greatest challenges facing society in the coming decades. However, there are significant barriers to access for many people suffer...
Gavin Doherty, John Sharry, Magnus Bång, Mar...
ISPD
2010
ACM
207views Hardware» more  ISPD 2010»
15 years 4 months ago
FOARS: FLUTE based obstacle-avoiding rectilinear steiner tree construction
Obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) construction is becoming one of the most sought after problems in modern design flow. In this paper we present FOARS, ...
Gaurav Ajwani, Chris Chu, Wai-Kei Mak