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MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
15 years 6 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
103
Voted
DAC
2008
ACM
16 years 1 months ago
Bi-decomposing large Boolean functions via interpolation and satisfiability solving
Boolean function bi-decomposition is a fundamental operation in logic synthesis. A function f(X) is bi-decomposable under a variable partition XA, XB, XC on X if it can be written...
Ruei-Rung Lee, Jie-Hong Roland Jiang, Wei-Lun Hung
VIIP
2001
15 years 1 months ago
Using Graphics Cards for Quantized FEM Computations
Graphics cards exercise increasingly more computing power and are highly optimized for high data transfer volumes. In contrast typical workstations perform badly when data exceeds...
Martin Rumpf, Robert Strzodka
105
Voted
STOC
2009
ACM
99views Algorithms» more  STOC 2009»
16 years 1 months ago
Testing juntas nearly optimally
A function on n variables is called a k-junta if it depends on at most k of its variables. In this article, we show that it is possible to test whether a function is a k-junta or ...
Eric Blais
DIAGRAMS
2000
Springer
15 years 4 months ago
Capacity Limits in Diagrammatic Reasoning
This paper examines capacity limits in mental animation of static diagrams of mechanical systems and interprets these limits within current theories of working memory. I review emp...
Mary Hegarty