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» Decoupled Hardware Support for Distributed Shared Memory
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TC
2011
14 years 6 months ago
Software-Based Cache Coherence with Hardware-Assisted Selective Self-Invalidations Using Bloom Filters
— Implementing shared memory consistency models on top of hardware caches gives rise to the well-known cache coherence problem. The standard solution involves implementing cohere...
Thomas J. Ashby, Pedro Diaz, Marcelo Cintra
HPCA
1995
IEEE
15 years 3 months ago
Software Cache Coherence for Large Scale Multiprocessors
Shared memory is an appealing abstraction for parallel programming. It must be implemented with caches in order toperform well, however, and caches require a coherence mechanism t...
Leonidas I. Kontothanassis, Michael L. Scott
IPPS
2008
IEEE
15 years 6 months ago
Early experience with out-of-core applications on the Cray XMT
This paper describes our early experiences with a preproduction Cray XMT system that implements a scalable shared memory architecture with hardware support for multithreading. Unl...
Daniel G. Chavarría-Miranda, Andrès ...
ICDCS
1996
IEEE
15 years 4 months ago
Supporting a Flexible Parallel Programming Model on a Network of Workstations
We introduce a shared memory software prototype system for executing programs with nested parallelism on a network of workstations. This programming model exhibits a very convenie...
Shih-Chen Huang, Zvi M. Kedem
ASPLOS
2012
ACM
13 years 7 months ago
Aikido: accelerating shared data dynamic analyses
Despite a burgeoning demand for parallel programs, the tools available to developers working on shared-memory multicore processors have lagged behind. One reason for this is the l...
Marek Olszewski, Qin Zhao, David Koh, Jason Ansel,...