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» Decoupled Hardware Support for Distributed Shared Memory
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SAS
2007
Springer
108views Formal Methods» more  SAS 2007»
15 years 5 months ago
Programming Language Design and Analysis Motivated by Hardware Evolution
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
Alan Mycroft
HPCA
2002
IEEE
16 years 4 days ago
A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning
We propose a low overhead, on-line memory monitoring scheme utilizing a set of novel hardware counters. The counters act like pressure gauges indicating the marginal gain in the n...
G. Edward Suh, Srinivas Devadas, Larry Rudolph
DEBS
2010
ACM
15 years 3 months ago
Evaluation of streaming aggregation on parallel hardware architectures
We present a case study parallelizing streaming aggregation on three different parallel hardware architectures. Aggregation is a performance-critical operation for data summarizat...
Scott Schneider, Henrique Andrade, Bugra Gedik, Ku...
CASES
2001
ACM
15 years 3 months ago
A system-on-a-chip lock cache with task preemption support
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
Bilge Saglam Akgul, Jaehwan Lee, Vincent John Moon...
LCPC
2007
Springer
15 years 6 months ago
Supporting Huge Address Spaces in a Virtual Machine for Java on a Cluster
Abstract. To solve problems that require far more memory than a single machine can supply, data can be swapped to disk in some manner, it can be compressed, and/or the memory of mu...
Ronald Veldema, Michael Philippsen