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» Decoupled Hardware Support for Distributed Shared Memory
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MICRO
2006
IEEE
113views Hardware» more  MICRO 2006»
14 years 11 months ago
Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers
We examine the ability of CMPs, due to their lower onchip communication latencies, to exploit data parallelism at inner-loop granularities similar to that commonly targeted by vec...
Jack Sampson, Rubén González, Jean-F...
CODES
2007
IEEE
15 years 6 months ago
A data protection unit for NoC-based architectures
Security is gaining increasing relevance in the development of embedded devices. Towards a secure system at each level of design, this paper addresses the security aspects related...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...
ICCD
2002
IEEE
122views Hardware» more  ICCD 2002»
15 years 8 months ago
Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example
Fault-tolerant distributed real-time systems are presently facing a lot of new challenges. Although many techniques provide effective masking of node failures on the architectural...
Andreas Steininger, Johann Vilanek
ICDCS
2008
IEEE
15 years 6 months ago
Strong WORM
We introduce a Write-Once Read-Many (WORM) storage system providing strong assurances of data retention and compliant migration, by leveraging trusted secure hardware in close dat...
Radu Sion
EUROPAR
2010
Springer
15 years 1 days ago
Multi-GPU and Multi-CPU Parallelization for Interactive Physics Simulations
Today, it is possible to associate multiple CPUs and multiple GPUs in a single shared memory architecture. Using these resources efficiently in a seamless way is a challenging issu...
Everton Hermann, Bruno Raffin, François Fau...