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» Decoupled Hardware Support for Distributed Shared Memory
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PDP
2010
IEEE
15 years 6 months ago
Lessons Learnt Porting Parallelisation Techniques for Irregular Codes to NUMA Systems
—This work presents a study undertaken to characterise the behaviour of some parallelisation techniques for irregular codes, previously developed for SMP architectures, on a seve...
Juan Angel Lorenzo, Juan Carlos Pichel, David LaFr...
PDP
2009
IEEE
15 years 6 months ago
High Throughput Intra-Node MPI Communication with Open-MX
Abstract—The increasing number of cores per node in highperformance computing requires an efficient intra-node MPI communication subsystem. Most existing MPI implementations rel...
Brice Goglin
IEEEPACT
2008
IEEE
15 years 6 months ago
The PARSEC benchmark suite: characterization and architectural implications
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
Christian Bienia, Sanjeev Kumar, Jaswinder Pal Sin...
ISPAN
2008
IEEE
15 years 6 months ago
A Taxonomy of Data Prefetching Mechanisms
Data prefetching has been considered an effective way to mask data access latency caused by cache misses and to bridge the performance gap between processor and memory. With hardw...
Surendra Byna, Yong Chen, Xian-He Sun
CASES
2011
ACM
13 years 12 months ago
Cost-effective safety and fault localization using distributed temporal redundancy
Cost pressure is driving vendors of safety-critical systems to integrate previously distributed systems. One natural approach we have previous introduced is On-Demand Redundancy (...
Brett H. Meyer, Benton H. Calhoun, John Lach, Kevi...