Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
We apply HCI design principles to redesign the dashboard of the automobile to address the problem of speeding. We prototyped and evaluated a new speedometer designed with the expl...
Future high performance microprocessor design with technology scaling beyond 90nm will pose two major challenges: (1) energy and power, and (2) parameter variations. Design practi...
This chapter describes a novel knowledge-based methodology and computer toolset for helping business process designers and participants better manage exceptions (unexpected deviati...