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ISCA
1998
IEEE
145views Hardware» more  ISCA 1998»
15 years 7 months ago
Multi-Level Texture Caching for 3D Graphics Hardware
Traditional graphics hardware architectures implement what we call the push architecture for texture mapping. Local memory is dedicated to the accelerator for fast local retrieval...
Michael Cox, Narendra Bhandri, Michael Shantz
SIGGRAPH
1998
ACM
15 years 7 months ago
Non-distorted Texture Mapping for Sheared Triangulated Meshes
This article introduces new techniques for non-distorted texture mapping on complex triangulated meshes. Texture coordinates are assigned to the vertices of the triangulation by u...
Bruno Lévy, Jean-Laurent Mallet
RTAS
1997
IEEE
15 years 7 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
ACSAC
2007
IEEE
15 years 7 months ago
Distributed Secure Systems: Then and Now
The early 1980s saw the development of some rather sophisticated distributed systems. These were not merely networked file systems: rather, using remote procedure calls, hierarchi...
Brian Randell, John M. Rushby
CASES
2007
ACM
15 years 7 months ago
Rethinking custom ISE identification: a new processor-agnostic method
The last decade has witnessed the emergence of the Application Specific Instruction-set Processor (ASIP) as a viable platform for embedded systems. Extensible ASIPs allow the user...
Ajay K. Verma, Philip Brisk, Paolo Ienne