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EURODAC
1995
IEEE
164views VHDL» more  EURODAC 1995»
13 years 9 months ago
Bottleneck removal algorithm for dynamic compaction and test cycles reduction
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
Srimat T. Chakradhar, Anand Raghunathan
MICRO
2006
IEEE
159views Hardware» more  MICRO 2006»
13 years 6 months ago
MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits
Shrinking devices to the nanoscale, increasing integration densities, and reducing of voltage levels down to the thermal limit, all conspire to produce faulty systems. Frequent oc...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
ITC
2002
IEEE
86views Hardware» more  ITC 2002»
13 years 11 months ago
Incremental Diagnosis of Multiple Open-Interconnects
With increasing chip interconnect distances, openinterconnect is becoming an important defect. The main challenge with open-interconnects stems from its non-deterministic real-lif...
Jiang Brandon Liu, Andreas G. Veneris, Hiroshi Tak...
JUCS
2007
95views more  JUCS 2007»
13 years 6 months ago
Using Place Invariants and Test Point Placement to Isolate Faults in Discrete Event Systems
: This paper describes a method of using Petri net P-invariants in system diagnosis. To model this process a net oriented fault classification is presented. Hence, the considered d...
Iwan Tabakow