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MICRO
1997
IEEE
141views Hardware» more  MICRO 1997»
15 years 2 months ago
Unroll-and-Jam Using Uniformly Generated Sets
Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory ha...
Steve Carr, Yiping Guan
DAC
1997
ACM
15 years 2 months ago
Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas
FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
15 years 2 months ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes
ECOOPW
1994
Springer
15 years 2 months ago
Abstracting Interactions Based on Message Sets
ing Interactions Based on Message Sets Svend Frr 1 and Gul Agha2. 1 Hewlett-Packard Laboratories, 1501 Page Mill Road, Palo Alto, CA 94303 2 University of Illinois, 1304 W. Springf...
Svend Frølund, Gul Agha
HYBRID
1994
Springer
15 years 2 months ago
Symbolic Controller Synthesis for Discrete and Timed Systems
This paper presents algorithms for the symbolic synthesis of discrete and real-time controllers. At the semantic level the controller is synthesized by nding a winning strategy for...
Eugene Asarin, Oded Maler, Amir Pnueli