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ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
15 years 5 months ago
A distributed FIFO scheme for on chip communication
— Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because of disturbances that result from parasiti...
Ray Robert Rydberg III, Jabulani Nyathi, Jos&eacut...
SENSYS
2009
ACM
15 years 6 months ago
VTrack: accurate, energy-aware road traffic delay estimation using mobile phones
Arvind Thiagarajan, Lenin Ravindranath, Katrina La...
INFOCOM
2008
IEEE
15 years 6 months ago
Designing a Fault-Tolerant Network Using Valiant Load-Balancing
—Commercial backbone networks must continue to operate even when links and routers fail. Routing schemes such as OSPF, IS-IS, and MPLS reroute traffic, but they cannot guarantee...
Rui Zhang-Shen, Nick McKeown
PAM
2009
Springer
15 years 6 months ago
Inferring POP-Level ISP Topology through End-to-End Delay Measurement
In this paper, we propose a new topology inference technique that aims to reveals how ISPs deploy their layer two and three networks at the POP level, without relying on ISP core n...
Kaoru Yoshida, Yutaka Kikuchi, Masateru Yamamoto, ...
GLVLSI
2002
IEEE
136views VLSI» more  GLVLSI 2002»
15 years 4 months ago
Test generation for resistive opens in CMOS
This paper develops new techniques for detecting both stuck-open faults and resistive open faults, which result in increased delays along some paths. The improved detection of CMO...
Arun Krishnamachary, Jacob A. Abraham