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» Delay modeling and static timing analysis for MTCMOS circuit...
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ICCD
2006
IEEE
119views Hardware» more  ICCD 2006»
15 years 8 months ago
FA-STAC: A Framework for Fast and Accurate Static Timing Analysis with Coupling
— This paper presents a framework for fast and accurate static timing analysis considering coupling. With technology scaling to smaller dimensions, the impact of coupling induced...
Debasish Das, Ahmed Shebaita, Hai Zhou, Yehea I. I...
GLVLSI
2006
IEEE
143views VLSI» more  GLVLSI 2006»
15 years 5 months ago
SACI: statistical static timing analysis of coupled interconnects
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, A...
DATE
1998
IEEE
98views Hardware» more  DATE 1998»
15 years 3 months ago
AFTA: A Formal Delay Model for Functional Timing Analysis
Despite its importance, we find that a rigorous theoretical foundation for performing timing analysis has been lacking so far. As a result, we have initiated a research project th...
V. Chandramouli, Jesse Whittemore, Karem A. Sakall...
TCAD
2002
146views more  TCAD 2002»
14 years 11 months ago
Static scheduling of multidomain circuits for fast functional verification
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
Murali Kudlugi, Russell Tessier
DAC
2005
ACM
15 years 1 months ago
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions
Variability of process parameters makes prediction of digital circuit timing characteristics an important and challenging problem in modern chip design. Recently, statistical stat...
Hongliang Chang, Vladimir Zolotov, Sambasivan Nara...