138 search results - page 9 / 28 » Delay modeling and static timing analysis for MTCMOS circuit... |
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ICCAD
1997
IEEE
15 years 3 months ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
ASPDAC
2008
ACM
15 years 1 months ago
2008
ACM
With continued scaling of technology into nanometer regimes, the impact of coupling induced delay variations is significant. While several coupling-aware static timers have been pr...
ICCAD
1997
IEEE
15 years 3 months ago
1997
IEEE
This paper is concerned with approximate delay computation algorithms for combinational circuits. As a result of intensive research in the early 90’s [3, 8] efficient tools exi...
JPDC
2011
14 years 6 months ago
2011
Networks-on-chip (NoCs) are used in a growing number of SoCs and multi-core processors. Because messages compete for the NoC’s shared resources, quality of service and resource ...
DAC
2005
ACM
16 years 18 days ago
2005
ACM
Recent study shows that the existing first order canonical timing model is not sufficient to represent the dependency of the gate delay on the variation sources when processing an...