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ECRTS
2010
IEEE
14 years 11 months ago
Making DRAM Refresh Predictable
Embedded control systems with hard real-time constraints require that deadlines are met at all times or the system may malfunction with potentially catastrophic consequences. Sched...
Balasubramanya Bhat, Frank Mueller
EUROPAR
2010
Springer
14 years 11 months ago
A Study of a Software Cache Implementation of the OpenMP Memory Model for Multicore and Manycore Architectures
Abstract. This paper is motivated by the desire to provide an efficient and scalable software cache implementation of OpenMP on multicore and manycore architectures in general, and...
Chen Chen, Joseph B. Manzano, Ge Gan, Guang R. Gao...
ICDE
2010
IEEE
189views Database» more  ICDE 2010»
14 years 10 months ago
Caching all plans with just one optimizer call
Abstract— Modern database management systems (DBMS) answer a multitude of complex queries on increasingly larger datasets. Given the complexities of the queries and the numerous ...
Debabrata Dash, Ioannis Alagiannis, Cristina Maier...
ICECCS
2010
IEEE
196views Hardware» more  ICECCS 2010»
14 years 10 months ago
Implementing and Evaluating a Model Checker for Transactional Memory Systems
Abstract—Transactional Memory (TM) is a promising technique that addresses the difficulty of parallel programming. Since TM takes responsibility for all concurrency control, TM ...
Woongki Baek, Nathan Grasso Bronson, Christos Kozy...
BMCBI
2010
153views more  BMCBI 2010»
14 years 10 months ago
MimoSA: a system for minimotif annotation
Background: Minimotifs are short peptide sequences within one protein, which are recognized by other proteins or molecules. While there are now several minimotif databases, they a...
Jay Vyas, Ronald J. Nowling, Thomas Meusburger, Da...
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