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ASPDAC
2008
ACM
94views Hardware» more  ASPDAC 2008»
15 years 6 months ago
Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
Sujan Pandey, Rolf Drechsler
TWC
2008
169views more  TWC 2008»
15 years 4 months ago
Antenna subset diversity with non-ideal channel estimation
In modern wireless systems employing diversity techniques, combining all the available diversity branches may not be feasible due to complexity and resource constraints. To allevia...
Wesley M. Gifford, Moe Z. Win, Marco Chiani
ICPP
2007
IEEE
15 years 11 months ago
RECN-IQ: A Cost-Effective Input-Queued Switch Architecture with Congestion Management
As the number of computing and storage nodes keeps increasing, the interconnection network is becoming a key element of many computing and communication systems, where the overall...
Gaspar Mora, Pedro Javier García, Jose Flic...
ICS
2007
Tsinghua U.
15 years 11 months ago
Sensitivity analysis for automatic parallelization on multi-cores
Sensitivity Analysis (SA) is a novel compiler technique that complements, and integrates with, static automatic parallelization analysis for the cases when relevant program behavi...
Silvius Rus, Maikel Pennings, Lawrence Rauchwerger
ATAL
2005
Springer
15 years 10 months ago
Sequential auctions for objects with common and private values
Sequential auctions are an important mechanism for buying/selling multiple objects. Existing work has studied sequential auctions for objects that are exclusively either common va...
S. Shaheen Fatima, Michael Wooldridge, Nicholas R....