24554 search results - page 4777 / 4911 » Dependable distributed systems |
164
click to vote
PPOPP
2009
ACM
16 years 6 months ago
2009
ACM
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
130
click to vote
SPAA
2009
ACM
16 years 6 months ago
2009
ACM
We present three new reader-writer lock algorithms that scale under high read-only contention. Many previous reader-writer locks suffer significant degradation when many readers a...
170
click to vote
HPCA
2009
IEEE
16 years 6 months ago
2009
IEEE
Previous studies have proposed techniques to dynamically change the architecture of a processor to better suit the characteristics of the workload at hand. However, all such appro...
152
click to vote
HPCA
2009
IEEE
16 years 6 months ago
2009
IEEE
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
161
click to vote
HPCA
2009
IEEE
16 years 6 months ago
2009
IEEE
Analytical modeling is an alternative to detailed performance simulation with the potential to shorten the development cycle and provide additional insights. This paper proposes a...