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ASAP
2009
IEEE
141views Hardware» more  ASAP 2009»
15 years 9 months ago
Accelerating a Virtual Ecology Model with FPGAs
—This paper describes the acceleration of virtual ecology models using field-programmable gate arrays (FPGAs). Our approach targets models generated by the Virtual Ecology Workb...
Julien Lamoureux, Tony Field, Wayne Luk
ICCD
2002
IEEE
98views Hardware» more  ICCD 2002»
15 years 8 months ago
Parallel Multiple-Symbol Variable-Length Decoding
In this paper, a parallel Variable-Length Decoding (VLD) scheme is introduced. The scheme is capable of decoding all the codewords in an N-bit buffer whose accumulated codelength ...
Jari Nikara, Stamatis Vassiliadis, Jarmo Takala, M...
ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
15 years 8 months ago
Correct-by-construction microarchitectural pipelining
— This paper presents a method for correct-by-construction microarchitectural pipelining that handles cyclic systems with dependencies between iterations. Our method combines pre...
Timothy Kam, Michael Kishinevsky, Jordi Cortadella...
ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
15 years 8 months ago
To SAT or not to SAT: Ashenhurst decomposition in a large scale
Functional decomposition is a fundamental operation in logic synthesis. Prior BDD-based approaches to functional decomposition suffer from the memory explosion problem and do not...
Hsuan-Po Lin, Jie-Hong Roland Jiang, Ruei-Rung Lee
ICCAD
2006
IEEE
146views Hardware» more  ICCAD 2006»
15 years 8 months ago
An analytical model for negative bias temperature instability
— Negative Bias Temperature Instability (NBTI) in PMOS transistors has become a significant reliability concern in present day digital circuit design. With continued scaling, th...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...