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IESS
2009
Springer
182views Hardware» more  IESS 2009»
14 years 11 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
CASES
2001
ACM
15 years 5 months ago
A system-on-a-chip lock cache with task preemption support
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
Bilge Saglam Akgul, Jaehwan Lee, Vincent John Moon...
RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
15 years 7 months ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
MSWIM
2006
ACM
15 years 7 months ago
Two methods of authenticated positioning
Recent studies and publications have shown a demand for a secure method to proof someones or somenthings position via a communication channel. In this paper we present a concept a...
Thomas Mundt
ROBOCUP
1999
Springer
95views Robotics» more  ROBOCUP 1999»
15 years 6 months ago
Spatial Agents Implemented in a Logical Expressible Language
In this paper, we present a multi-layered architecture for spatial and temporal agents. The focus is laid on the declarativity of the approach, which makes agent scripts expressive...
Frieder Stolzenburg, Oliver Obst, Jan Murray, Bj&o...