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114
Voted
HICSS
2006
IEEE
164views Biometrics» more  HICSS 2006»
15 years 8 months ago
A Methodology for Generating Application-Specific Heterogeneous Processor Arrays
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
Stephen D. Craven, Cameron Patterson, Peter M. Ath...
CPE
2003
Springer
149views Hardware» more  CPE 2003»
15 years 7 months ago
Logical and Stochastic Modeling with SMART
We describe the main features of SmArT, a software package providing a seamless environment for the logic and probabilistic analysis of complex systems. SmArT can combine differen...
Gianfranco Ciardo, R. L. Jones III, Andrew S. Mine...
105
Voted
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
15 years 6 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
97
Voted
FPL
2008
Springer
111views Hardware» more  FPL 2008»
15 years 3 months ago
Sampling from the exponential distribution using independent Bernoulli variates
The exponential distribution is a key distribution in many event-driven Monte-Carlo simulations, where it is used to model the time between random events in the system. This paper...
David B. Thomas, Wayne Luk
129
Voted
SIGMETRICS
2010
ACM
181views Hardware» more  SIGMETRICS 2010»
15 years 2 months ago
A unified modeling framework for distributed resource allocation of general fork and join processing networks
This paper addresses the problem of distributed resource allocation in general fork and join processing networks. The problem is motivated by the complicated processing requiremen...
Haiquan (Chuck) Zhao, Cathy H. Xia, Zhen Liu, Dona...