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95
Voted
DAC
2002
ACM
16 years 2 months ago
IP delivery for FPGAs using Applets and JHDL
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...
Michael J. Wirthlin, Brian McMurtrey
145
Voted
DAC
2004
ACM
15 years 5 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
COMPSAC
2008
IEEE
15 years 8 months ago
Embedded Architecture Description Language
In the state-of-the-art hardware/software (HW/SW) codesign of embedded systems, there is a lack of sufficient support for architectural specifications across HW/SW boundaries. S...
Juncao Li, Nicholas T. Pilkington, Fei Xie, Qiang ...
71
Voted
DATE
1998
IEEE
73views Hardware» more  DATE 1998»
15 years 6 months ago
A Formal Description of VHDL-AMS Analogue Systems
A formal definition of the general VHDLAMS analogue system has been proposed to relate the way in which the language affects the specification of a non-linear discontinuous analog...
Tom J. Kazmierski
ISSTA
2009
ACM
15 years 6 months ago
Run-time conformance checking of mobile and distributed systems using executable models
This paper describes an approach for conformance testing of mobile and distributed systems. The approach is based on kiltera — a novel, high-level language supporting the descri...
Ahmad A. Saifan, Ernesto Posse, Jürgen Dingel