836 search results - page 165 / 168 » Description logic programs: combining logic programs with de... |
ISCA
2008
IEEE
15 years 4 months ago
2008
IEEE
As CMOS technology scales and more transistors are packed on to the same chip, soft error reliability has become an increasingly important design issue for processors. Prior resea...
VRCAI
2004
ACM
15 years 3 months ago
2004
ACM
Despite steady research advances in many aspects of virtual reality, building and testing virtual worlds remains to be a very difficult process. Most virtual environments are stil...
CF
2010
ACM
15 years 2 months ago
2010
ACM
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
CPAIOR
2006
Springer
15 years 1 months ago
2006
Springer
Temporal planning (TP) is notoriously difficult because it requires to solve a propositional STRIPS planning problem with temporal constraints. In this paper, we propose an efficie...
EMSOFT
2006
Springer
15 years 1 months ago
2006
Springer
We report on a case study in which the model checker Uppaal is used to formally model parts of Zeroconf, a protocol for dynamic configuration of IPv4 link-local addresses that has...