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» Descriptive Complexity and Model Checking
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114
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VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
16 years 1 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
83
Voted
ICFP
2007
ACM
16 years 17 days ago
Faster laziness using dynamic pointer tagging
In the light of evidence that Haskell programs compiled by GHC exhibit large numbers of mispredicted branches on modern processors, we re-examine the "tagless" aspect of...
Simon Marlow, Alexey Rodriguez Yakushev, Simon L. ...
78
Voted
ICCAD
2008
IEEE
116views Hardware» more  ICCAD 2008»
15 years 9 months ago
Optimization-based framework for simultaneous circuit-and-system design-space exploration: a high-speed link example
—Connecting system-level performance models with circuit information has been a long-standing problem in analog/mixed-signal front-ends, like radios and high-speed links. High-sp...
Ranko Sredojevic, Vladimir Stojanovic
IROS
2009
IEEE
205views Robotics» more  IROS 2009»
15 years 7 months ago
Probabilistic categorization of kitchen objects in table settings with a composite sensor
— In this paper, we investigate the problem of 3D object categorization of objects typically present in kitchen environments, from data acquired using a composite sensor. Our fra...
Zoltan Csaba Marton, Radu Bogdan Rusu, Dominik Jai...
MFCS
2009
Springer
15 years 7 months ago
Synthesis for Structure Rewriting Systems
Abstract. The description of a single state of a modelled system is often complex in practice, but few procedures for synthesis address this problem in depth. We study systems in w...
Lukasz Kaiser