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CDES
2010
184views Hardware» more  CDES 2010»
14 years 7 months ago
Delay-Insensitive Cell Matrix
This paper describes the design of a delay-insensitive (DI) Cell Matrix. This architecture allows for massively parallel, self-determined operation and can be used to implement reg...
Scott Smith, David Roclin, Jia Di
HPDC
2005
IEEE
15 years 3 months ago
Design and implementation tradeoffs for wide-area resource discovery
This paper describes the design and implementation of SWORD, a scalable resource discovery service for widearea distributed systems. In contrast to previous systems, SWORD allows ...
David L. Oppenheimer, Jeannie R. Albrecht, David A...
IEEEPACT
2005
IEEE
15 years 3 months ago
Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
Yonghong Song, Spiros Kalogeropulos, Partha Tiruma...
58
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SIGIR
2003
ACM
15 years 3 months ago
The TREC-like evaluation of music IR systems
This poster reports upon the ongoing efforts being made to establish TREC-like and other comprehensive evaluation paradigms within the Music IR (MIR) and Music Digital Library (MD...
J. Stephen Downie
RSP
2008
IEEE
118views Control Systems» more  RSP 2008»
15 years 4 months ago
Functional DIF for Rapid Prototyping
Dataflow formalisms have provided designers of digital signal processing systems with optimizations and guarantees to arrive at quality prototypes quickly. As system complexity in...
William Plishker, Nimish Sane, Mary Kiemb, Kapil A...