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TPDS
2010
166views more  TPDS 2010»
14 years 6 months ago
Configurable Middleware for Distributed Real-Time Systems with Aperiodic and Periodic Tasks
Different distributed real-time systems (DRS) must handle aperiodic and periodic events under diverse sets of requirements. While existing middleware such as Real-Time CORBA has sh...
Yuanfang Zhang, Christopher D. Gill, Chenyang Lu
PODC
2011
ACM
14 years 2 months ago
On the power of hardware transactional memory to simplify memory management
Dynamic memory management is a significant source of complexity in the design and implementation of practical concurrent data structures. We study how hardware transactional memo...
Aleksandar Dragojevic, Maurice Herlihy, Yossi Lev,...
ICCD
2007
IEEE
140views Hardware» more  ICCD 2007»
15 years 3 months ago
Continual hashing for efficient fine-grain state inconsistency detection
Transaction-level modeling (TLM) allows a designer to save functional verification effort during the modular refinement of an SoC by reusing the prior implementation of a module a...
Jae W. Lee, Myron King, Krste Asanovic
ISCA
2008
IEEE
170views Hardware» more  ISCA 2008»
15 years 5 months ago
Polymorphic On-Chip Networks
As the number of cores per die increases, be they processors, memory blocks, or custom accelerators, the on-chip interconnect the cores use to communicate gains importance. We beg...
Martha Mercaldi Kim, John D. Davis, Mark Oskin, To...
ICNP
2003
IEEE
15 years 4 months ago
Stress Resistant Scheduling Algorithms for CIOQ Switches
Practical crossbar scheduling algorithms for CIOQ switches such as PIM and ¢ -SLIP, can perform poorly under extreme traffic conditions, frequently failing to be workconserving....
Prashanth Pappu, Jonathan S. Turner