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FPL
2006
Springer
124views Hardware» more  FPL 2006»
15 years 3 months ago
A Dynamically Reconfigurable Queue Scheduler
In this paper we present the design and implementation of a dynamically reconfigurable system for packet queue scheduling. Two widely accepted queue schedulers have been implement...
Christoforos Kachris, Stamatis Vassiliadis
USS
2008
15 years 1 months ago
Selective Versioning in a Secure Disk System
Making vital disk data recoverable even in the event of OS compromises has become a necessity, in view of the increased prevalence of OS vulnerability exploits over the recent yea...
Swaminathan Sundararaman, Gopalan Sivathanu, Erez ...
NSDI
2010
15 years 23 days ago
Prophecy: Using History for High-Throughput Fault Tolerance
Byzantine fault-tolerant (BFT) replication has enjoyed a series of performance improvements, but remains costly due to its replicated work. We eliminate this cost for read-mostly ...
Siddhartha Sen, Wyatt Lloyd, Michael J. Freedman
DAC
2010
ACM
14 years 11 months ago
RAMP gold: an FPGA-based architecture simulator for multiprocessors
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throu...
Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yun...
JTRES
2010
ACM
14 years 11 months ago
Developing safety critical Java applications with oSCJ/L0
We present oSCJ, an implementation of the draft of Safety Critical Java (SCJ) specification. SCJ is designed to make Java amenable to writing mission- and safety-critical software...
Ales Plsek, Lei Zhao, Veysel H. Sahin, Daniel Tang...