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INFOCOM
2002
IEEE
15 years 5 months ago
Towards Simple, High-performance Schedulers for High-aggregate Bandwidth Switches
— High-aggregate bandwidth switches are those whose port count multiplied by the operating line rate is very high; for example, a 30 port switch operating at 40 Gbps or a 1000 po...
Paolo Giaccone, Balaji Prabhakar, Devavrat Shah
GLVLSI
2005
IEEE
132views VLSI» more  GLVLSI 2005»
15 years 6 months ago
FPGA implementation of a modular and pipelined WF scheduler for high speed OC192 networks
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
Abdallah Merhebi, Otmane Aït Mohamed
ICCD
2008
IEEE
111views Hardware» more  ICCD 2008»
15 years 9 months ago
Power switch characterization for fine-grained dynamic voltage scaling
—Dynamic voltage scaling (DVS) provides power savings for systems with varying performance requirements. One low overhead implementation of DVS uses PMOS power switches to connec...
Liang Di, Mateja Putic, John Lach, Benton H. Calho...
94
Voted
GLOBECOM
2008
IEEE
15 years 16 days ago
Analysis of Load-Balanced Switch with Finite Buffers
Recently the Birkhoff-von Neumann load-balanced (LB) switch has become a promising switch design due to its high scalability properties and simple control. The performance of the L...
Yury Audzevich, Yoram Ofek, Miklós Telek, B...
174
Voted
OSN
2011
14 years 3 months ago
A parallel iterative scheduler for asynchronous Optical Packet Switching networks
—This paper presents PI-OPS (Parallel-Iterative Optical Packet Scheduler) a parallel-iterative scheduler for asynchronous Optical Packet Switching nodes with optical buffering. O...
Pablo Pavón-Mariño, M. Victoria Buen...