135 search results - page 17 / 27 » Design, layout and verification of an FPGA using automated t... |
111
Voted
DAC
2002
ACM
16 years 2 months ago
2002
ACM
A central problem in functional verification is to check that a circuit block is producing correct outputs while enforcing that the environment is providing legal inputs. To attac...
DAC
2006
ACM
16 years 2 months ago
2006
ACM
Multimedia SoCs are characterized by a main controller that directs the activity of several cores, each of which is in charge of a stage in the processing of a media stream. The v...
145
Voted
AMOST
2007
ACM
15 years 5 months ago
2007
ACM
We have devised a novel technique to automatically generate test cases for a software system, combining black-box model-based testing with white-box parameterized unit testing. Th...
211
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DAC
2008
ACM
16 years 2 months ago
2008
ACM
SystemCoDesigner is an ESL tool developed at the University of Erlangen-Nuremberg, Germany. SystemCoDesigner offers a fast design space exploration and rapid prototyping of behavi...
DAC
2007
ACM
16 years 2 months ago
2007
ACM
The ability of modern SAT solvers to produce proofs of unsatisfiability for Boolean formulas has become a powerful tool for EDA applications. Proofs are generated from a resolve t...