135 search results - page 8 / 27 » Design, layout and verification of an FPGA using automated t... |
ICFEM
2007
Springer
15 years 3 months ago
2007
Springer
Abstract. Refinement plays a crucial role in "top-down" styles of verification, such as the refinement calculus, but for probabilistic systems proof of refinement is a pa...
110
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IPPS
2006
IEEE
15 years 5 months ago
2006
IEEE
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
97
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FMICS
2006
Springer
15 years 3 months ago
2006
Springer
Parking garages that stow and retrieve cars automatically are becoming viable solutions for parking shortages. However, these are complex systems and a number of severe incidents i...
DAC
2008
ACM
16 years 18 days ago
2008
ACM
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
106
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DAC
2000
ACM
15 years 4 months ago
2000
ACM
The ordered tree (O-tree) representation has recently gained much interest in layout design automation. Different from previous topological representations of non-slicing floorpl...