497 search results - page 34 / 100 » Design Challenges for High Performance Nano-Technology |
ERSA
2007
14 years 11 months ago
2007
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...
128
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GECCO
2004
Springer
15 years 2 months ago
2004
Springer
Abstract. Improving image quality is the backbone of highly competitive display industry. Contemporary video processing system design is a challenging optimization problem. General...
FPGA
2007
ACM
15 years 3 months ago
2007
ACM
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
165
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ASPLOS
2009
ACM
15 years 10 months ago
2009
ACM
Future processors are expected to observe increasing rates of hardware faults. Using Dual-Modular Redundancy (DMR), two cores of a multicore can be loosely coupled to redundantly ...
INFOCOM
2008
IEEE
15 years 3 months ago
2008
IEEE
— Load factor based congestion control schemes have shown to enhance network performance, in terms of utilization, packet loss and delay. In these schemes, using more accurate re...