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» Design Challenges for High Performance Nano-Technology
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RTSS
2006
IEEE
15 years 5 months ago
Processor Scheduler for Multi-Service Routers
In this paper, we describe the design and evaluation of a scheduler (referred to as Everest) for allocating processors to services in high performance, multi-service routers. A sc...
Ravi Kokku, Upendra Shevade, Nishit Shah, Ajay Mah...
CCS
2011
ACM
13 years 11 months ago
MIDeA: a multi-parallel intrusion detection architecture
Network intrusion detection systems are faced with the challenge of identifying diverse attacks, in extremely high speed networks. For this reason, they must operate at multi-Giga...
Giorgos Vasiliadis, Michalis Polychronakis, Sotiri...
CORR
2010
Springer
177views Education» more  CORR 2010»
14 years 9 months ago
Dynamic Scheduling of Skippable Periodic Tasks with Energy Efficiency in Weakly Hard Real-Time System
Energy consumption is a critical design issue in real-time systems, especially in battery- operated systems. Maintaining high performance, while extending the battery life between...
Santhi Baskaran, P. Thambidurai
DAC
2009
ACM
15 years 4 months ago
A computing origami: folding streams in FPGAs
Stream processing represents an important class of applications that spans telecommunications, multimedia and the Internet. The implementation of streaming programs in FPGAs has a...
Andrei Hagiescu, Weng-Fai Wong, David F. Bacon, Ro...
BROADNETS
2004
IEEE
15 years 3 months ago
Handheld Routers: Intelligent Bandwidth Aggregation for Mobile Collaborative Communities
Multi-homed, mobile wireless computing and communication devices can spontaneously form communities to logically combine and share the bandwidth of each other's wide-area com...
Puneet Sharma, Sung-Ju Lee, Jack Brassil, Kang G. ...