137 search results - page 18 / 28 » Design Challenges for New Application-Specific Processors |
FCCM
2006
IEEE
15 years 3 months ago
2006
IEEE
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
91
Voted
IPPS
2008
IEEE
15 years 4 months ago
2008
IEEE
The Sony-Toshiba-IBM Cell Broadband Engine is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD coprocessing units (SPEs) ...
122
Voted
BSDCON
2003
14 years 11 months ago
2003
The existing thread scheduler in FreeBSD was well suited towards the computing environment that it was developed in. As the priorities and hardware targets of the project have cha...
VLSISP
2011
14 years 4 months ago
2011
Abstract Fractional Motion Estimation (FME) in highdefinition H.264 presents a significant design challenge in terms of memory bandwidth, latency and area cost as there are various...
83
Voted
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
Efficient multisite job scheduling facilitates the cooperation of multi-domain massively parallel processor systems in a computing grid environment. However, co-allocation, hetero...